Download Digital Integrated Circuits by Thomas A. DeMassa PDF

By Thomas A. DeMassa

Includes the main large insurance of electronic built-in circuits to be had in one resource. offers entire qualitative descriptions of circuit operation by means of in-depth analytical analyses and spice simulations. The circuit households defined intimately are transistor-transistor common sense (TTL, STTL, and ASTTL), emitter-coupled good judgment (ECL), NMOS good judgment, CMOS common sense, dynamic CMOS, BiCMOS buildings and numerous GASFET applied sciences. as well as special presentation of the fundamental inverter circuits for every electronic common sense relations, whole info of alternative good judgment circuits for those households are offered.

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General J. Buchanan, CMOS/TTL Digital Systems Design, McGraw-Hill, 1990. H. Haznedar, Digital Micro-Electronics, Benjamin/Cummings, 1991. D. Hodges and H. , McGrawHill, 1988. M. Smith, Application-Specific Integrated Circuits, Addison-Wesley, 1997. R. K. Watts, Submicron Integrated Circuits, Wiley, 1989. REFERENCES [Bardeen48] J. Bardeen and W. Brattain, “The Transistor, a Semiconductor Triode,” Phys. , vol. 74, p. 230, July 15, 1948. [Beeson62] R. Beeson and H. Ruegg, “New Forms of All Transistor Logic,” ISSCC Digest of Technical Papers, pp.

7) is only valid under the condition that the pn-junction is an abrupt junction, where the transition from n to p material is instantaneous. This is often not the case in actual integrated-circuit pn-junctions, where the transition from n to p material can be gradual. In those cases, a linear distribution of the impurities across the junction is a better approximation than the step function of the abrupt junction. An analysis of the linearly-graded junction shows that the junction capacitance equation of Eq.

Under the mentioned conditions, both junctions have a 0 V bias and can be considered off, which results in an extremely high resistance between drain and source. 13. The gate and substrate form the plates of a capacitor with the gate oxide as the dielectric. The positive gate voltage causes positive charge to accumulate on the gate electrode and negative charge on the substrate side. The latter manifests itself initially by repelling mobile holes. Hence, a depletion region is formed below the gate.

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